Integrated circuits in the form of a chip or die are typically enclosed by a package that is mounted to a printed circuit board. The package has a number of external contacts on, for example, a land side of a package substrate that are connected to the printed circuit board and dedicated to the various power, ground and signal pins of the integrated circuit. Typical techniques for connecting contacts of a package with contacts of a printed circuit board include solder ball, pin, and socket techniques. In a situation where the contacts are not formed by solder balls that are attached to conductive contacts or lands of the package substrate, a typical package reference is as a land grid array (LGA) package.
A package substrate typically has internal routing layers which connect external lands to contacts on an opposite side of the substrate package that are connected to the integrated circuit chip or die. An internal routing layer typically contains separate layers for a ground bus, a power bus and a plurality of signal lines. The various layers are connected to the external lands by vias that extend through the substrate.
In general, the amount of current required of a die determines a performance of the die. If package resistance is high, current flow in the package will be reduced and the package and die will require more power. If resistance is low, the integrated circuit die can function at a lower power (e.g., 1.3 to 1.5 volts). Thus, one objective is to develop a low resistivity package.
As noted above, a package substrate has multiple conductive layers and power dissipation with respect to these layers is generally minimal. Most of the power dissipation of a substrate package occurs at the contacts or lands. Thus, in one sense, the lands determine the overall resistivity of the package substrate.
According to a current process, the external conductive lands of a package substrate are copper coated structures. For example, a copper contact formed in the substrate package is coated with a layer of nickel, followed by a coating of palladium, followed by a coating of gold.